DK-DEV-4SGX230N Altera, DK-DEV-4SGX230N Datasheet - Page 165

KIT DEVELOPMENT STRATIX IV

DK-DEV-4SGX230N

Manufacturer Part Number
DK-DEV-4SGX230N
Description
KIT DEVELOPMENT STRATIX IV
Manufacturer
Altera
Series
Stratix® IVr
Type
FPGAr

Specifications of DK-DEV-4SGX230N

Contents
Development Board, Universal Power Supply, Cables and Software
Silicon Manufacturer
Altera
Core Architecture
FPGA
Core Sub-architecture
Stratix
Silicon Core Number
EP4S
Silicon Family Name
Stratix IV GX
Rohs Compliant
Yes
For Use With/related Products
EP4SGX230K
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
544-2594

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DK-DEV-4SGX230N
Manufacturer:
Altera
Quantity:
135
Part Number:
DK-DEV-4SGX230N
Manufacturer:
ALTERA
0
Chapter 5: Clock Networks and PLLs in Stratix IV Devices
PLLs in Stratix IV Devices
February 2011 Altera Corporation
Charge Pump and Loop Filter
You can reconfigure the charge-pump and loop-filter settings to update the PLL
bandwidth in real time.
Table 5–12
Stratix IV PLLs.
Table 5–12. Charge Pump Current Bit Settings
Table 5–13
PLLs.
Table 5–13. Loop-Filter Resistor Bit Settings
Table 5–14
PLLs.
Table 5–14. Loop-Filter Capacitor Bit Settings
LFR[4]
0
0
0
0
1
1
1
1
1
1
1
CP[2]
0
0
0
1
LFC[1]
lists the possible settings for charge pump current (Icp) values for
lists the possible settings for loop-filter resistor (R) values for Stratix IV
lists the possible settings for loop-filter capacitor (C) values for Stratix IV
0
0
1
LFR[3]
0
0
0
1
0
0
0
1
1
1
1
CP[1]
0
0
1
1
LFR[2]
0
0
1
0
0
0
1
0
0
1
1
LFC[0]
0
1
1
LFR[1]
0
1
0
0
0
1
0
0
1
0
1
CP[0]
0
1
1
1
LFR[0]
0
1
0
0
0
1
0
0
1
0
0
Decimal Value for Setting
Decimal Value for Setting
Stratix IV Device Handbook Volume 1
Decimal Value for Setting
0
1
3
0
3
7
1
16
19
20
24
27
28
30
0
3
4
8
5–49

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