DK-DEV-4SGX230N Altera, DK-DEV-4SGX230N Datasheet - Page 988
DK-DEV-4SGX230N
Manufacturer Part Number
DK-DEV-4SGX230N
Description
KIT DEVELOPMENT STRATIX IV
Manufacturer
Altera
Series
Stratix® IVr
Type
FPGAr
Datasheets
1.EP4SGX110DF29C3N.pdf
(80 pages)
2.EP4SGX110DF29C3N.pdf
(1154 pages)
3.DK-DEV-4SGX230N.pdf
(2 pages)
4.DK-DEV-4SGX530N.pdf
(57 pages)
Specifications of DK-DEV-4SGX230N
Contents
Development Board, Universal Power Supply, Cables and Software
Silicon Manufacturer
Altera
Core Architecture
FPGA
Core Sub-architecture
Stratix
Silicon Core Number
EP4S
Silicon Family Name
Stratix IV GX
Rohs Compliant
Yes
For Use With/related Products
EP4SGX230K
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
544-2594
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DK-DEV-4SGX230N
Manufacturer:
Altera
Quantity:
135
- EP4SGX110DF29C3N PDF datasheet
- EP4SGX110DF29C3N PDF datasheet #2
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1–30
Figure 1–10. MegaWizard Plug-In Manager Options—Main PLL Screen
Table 1–8. MegaWizard Plug-In Manager Options (Main PLL Screen) (Part 1 of 3)
Stratix IV Device Handbook Volume 3
Main Tx PLL/Rx PLL Settings
Use central clock divider to
drive the transmitter
channels using ×4/×N lines
What is the PLL logical
reference index (used in
reconfiguration)?
ALTGX Setting
Figure 1–10
MegaWizard Plug-In Manager.
Table 1–8
Plug-In Manager for your ALTGX custom megafunction variation.
If this option is enabled, the transmitter PLL is outside the
transceiver block. If this option is disabled, the transmitter
PLL is one of the CMU PLLs within the same transceiver
block.
The PLL logical reference index is selected based on the
location of the alternate PLL. If the Use central clock divider
to drive the transmitter channels using ×4/×N lines option is
unchecked this must be 0 or 1, otherwise this must be 2 or 3.
lists the available options on the Main PLL screen of the MegaWizard
shows the options available on the Main PLL screen of the ALTGX
Description
Chapter 1: ALTGX Transceiver Setup Guide for Stratix IV Devices
February 2011 Altera Corporation
“Selecting the PLL Logical
Reference Index for
Additional PLLs” and the
“Multi-PLL Settings”
sections in the
Reconfiguration in
Stratix IV Devices
“Selecting the PLL Logical
Reference Index for
Additional PLLs” and
“Selecting the Logical
Reference Index of the CMU
PLL” sections in the
Dynamic Reconfiguration in
Stratix IV Devices
Reconfiguration Settings
Reference
Dynamic
chapter.
chapter.
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