DK-DEV-4SGX230N Altera, DK-DEV-4SGX230N Datasheet - Page 875

• Manufacturer Part Number: DK-DEV-4SGX230N
• Description: KIT DEVELOPMENT STRATIX IV
• Manufacturer: Altera
• Series: Stratix® IVr
• Type: FPGAr

Specifications of DK-DEV-4SGX230N

• Contents: Development Board, Universal Power Supply, Cables and Software
• Silicon Manufacturer: Altera
• Core Architecture: FPGA
• Core Sub-architecture: Stratix
• Silicon Core Number: EP4S
• Silicon Family Name: Stratix IV GX
• Rohs Compliant: Yes
• For Use With/related Products: EP4SGX230K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 544-2594

Chapter 5: Dynamic Reconfiguration in Stratix IV Devices
Dynamic Reconfiguration Modes Implementation
Figure 5–16. Logical Reference Index of CMU PLLs in a Transceiver Block
Note to
(1) After the device powers up, the busy signal remains low for the first reconfig_clk cycle.
February 2011 Altera Corporation
Figure
refclk0
refclk1
5–16:
156.25 MHz
125 MHz
In
Similarly, transceiver channel 2 listens to CMU1 PLL of the transceiver block.
To direct the ALTGX_RECONFIG instance to dynamically reconfigure CMU0 PLL,
specify its logical reference index (the identity of a transmitter PLL). Similarly, to
direct the ALTGX_RECONFIG instance to dynamically reconfigure CMU1 PLL instead,
provide the logical reference index of CMU1 PLL. The allowed values for the logical
reference index of the CMU PLLs within a transceiver block are 0 or 1. Similarly, the
transmitter PLLs outside the transceiver block can also be assigned a logical reference
index value. For more information, refer to
Index for Additional PLLs” on page
Figure
Selecting the Logical Reference Index of the CMU PLL
5–16, transceiver channel 1 listens to CMU0 PLL of the transceiver block.
clock
mux
clock
mux
CMU Channels
6.25 Gbps
CMU0 PLL
2.5 Gbps
CMU1 PLL
5–52.
“Selecting the PLL Logical Reference
Logical
TX PLL
select
TX PLL
Logical
clock
mux
select
(Note 1)
clock
mux
Stratix IV Device Handbook Volume 2: Transceivers
Full Duplex Transceiver Channel 1
Full Duplex Transceiver Channel 2
DIVIDER
LOCAL
6.25 Gbps
TX CHANNEL 1
RX CHANNEL 1
DIVIDER
RX CDR
RX CHANNEL 2
TX CHANNEL 2
LOCAL
RX CDR
2.5 Gbps
TX PMA + TX PCS
RX PMA + RX PCS
TX PMA + TX PCS
RX PMA + RX PCS
6.25 Gbps
6.25 Gbps
2.5 Gbps
2.5 Gbps
5–29