DK-DEV-4SGX230N Altera, DK-DEV-4SGX230N Datasheet - Page 1140
![KIT DEVELOPMENT STRATIX IV](/photos/28/41/284156/dk-dev-4sgx230n_sml.jpg)
DK-DEV-4SGX230N
Manufacturer Part Number
DK-DEV-4SGX230N
Description
KIT DEVELOPMENT STRATIX IV
Manufacturer
Altera
Series
Stratix® IVr
Type
FPGAr
Datasheets
1.EP4SGX110DF29C3N.pdf
(80 pages)
2.EP4SGX110DF29C3N.pdf
(1154 pages)
3.DK-DEV-4SGX230N.pdf
(2 pages)
4.DK-DEV-4SGX530N.pdf
(57 pages)
Specifications of DK-DEV-4SGX230N
Contents
Development Board, Universal Power Supply, Cables and Software
Silicon Manufacturer
Altera
Core Architecture
FPGA
Core Sub-architecture
Stratix
Silicon Core Number
EP4S
Silicon Family Name
Stratix IV GX
Rohs Compliant
Yes
For Use With/related Products
EP4SGX230K
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
544-2594
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DK-DEV-4SGX230N
Manufacturer:
Altera
Quantity:
135
- EP4SGX110DF29C3N PDF datasheet
- EP4SGX110DF29C3N PDF datasheet #2
- DK-DEV-4SGX230N PDF datasheet #3
- DK-DEV-4SGX530N PDF datasheet #4
- Current page: 1140 of 1154
- Download datasheet (32Mb)
1–58
Figure 1–6. LVDS Soft-CDR/DPA Sinusoidal Jitter Tolerance Specification for a Data Rate Less than 1.25 Gbps
Table 1–45. DLL Frequency Range Specifications for Stratix IV Devices—Preliminary (Part 1 of 2)
Stratix IV Device Handbook Volume 4: Device Datasheet and Addendum
Frequency
Mode
0
1
2
3
4
5
6
0.1 UI
Sinusoidal Jitter Amplitude
P-P
Speed Grade
120-180
150-220
180-280
240-350
290-430
360-540
–2/–2×
90-140
Table 1–44
data rate equal to or higher than 1.25 Gbps.
Table 1–44. LVDS Soft-CDR/DPA Sinusoidal Jitter Mask Values for a Data Rate Equal to or Higher
than 1.25 Gbps
Figure 1–6
a data rate less than 1.25 Gbps.
DLL and DQS Logic Block Specifications
Table 1–45
Frequency Range (MHz)
Speed Grade
shows the LVDS soft-CDR/DPA sinusoidal jitter tolerance specification for
lists the LVDS soft-CDR/DPA sinusoidal jitter tolerance specification for a
lists the DLL frequency range specifications for Stratix IV devices.
120-170
150-210
180-260
240-320
290-380
360-450
F1
F2
F3
F4
90-130
–3
Jitter Frequency (Hz)
20db/dec
Speed Grade
120-160
150-200
180-240
240-290
290-360
360-450
90-120
–4
Chapter 1: DC and Switching Characteristics for Stratix IV Devices
baud/1667
50,000,000
1,493,000
Available Phase Shift
22.5°, 45°, 67.5°, 90°
36°, 72°, 108°, 144°
36°, 72°, 108°, 144°
45°, 90°, 135°, 180°
45°, 90°,135°, 180°
10,000
17,565
30°, 60°, 90°, 120°
30°, 60°, 90°, 120°
20 MHz
DQS Delay Buffer
Sinusoidal Jitter (UI)
Mode
April 2011 Altera Corporation
High
High
High
Low
Low
Low
Low
Switching Characteristics
25.000
25.000
(1)
0.350
0.350
Frequency
Number of
Chains
Delay
16
12
10
12
10
8
8
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