DK-DEV-4SGX230N Altera, DK-DEV-4SGX230N Datasheet - Page 99

• Manufacturer Part Number: DK-DEV-4SGX230N
• Description: KIT DEVELOPMENT STRATIX IV
• Manufacturer: Altera
• Series: Stratix® IVr
• Type: FPGAr

Specifications of DK-DEV-4SGX230N

• Contents: Development Board, Universal Power Supply, Cables and Software
• Silicon Manufacturer: Altera
• Core Architecture: FPGA
• Core Sub-architecture: Stratix
• Silicon Core Number: EP4S
• Silicon Family Name: Stratix IV GX
• Rohs Compliant: Yes
• For Use With/related Products: EP4SGX230K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 544-2594

Chapter 4: DSP Blocks in Stratix IV Devices
Stratix IV Operational Mode Descriptions
February 2011 Altera Corporation
36-Bit Multiplier
You can efficiently construct a 36 × 36 multiplier using four 18 × 18 multipliers. This
simplification fits conveniently into one half DSP block and is implemented in the
DSP block automatically by selecting 36 × 36 mode. Stratix IV devices can have up to
two 36-bit multipliers per DSP block (one 36-bit multiplier per half DSP block). The
36-bit multiplier is also under the independent multiplier mode but uses the entire
half DSP block, including the dedicated hardware logic after the pipeline registers to
implement the 36 × 36 bit multiplication operation, as shown in
The 36-bit multiplier is useful for applications requiring more than 18-bit precision;
for example, for the mantissa multiplication portion of single precision and extended
single precision floating-point arithmetic applications.
Figure 4–11. 36-Bit Independent Multiplier Mode Shown for a Half DSP Block
dataa_0[35..18]
datab_0[35..18]
datab_0[35..18]
dataa_0[35..18]
dataa_0[17..0]
datab_0[17..0]
dataa_0[17..0]
datab_0[17..0]
clock[3..0]
ena[3..0]
aclr[3..0]
Half-DSP Block
signa
signb
+
+
+
Stratix IV Device Handbook Volume 1
Figure
4–11.
72
result[ ]
4–19