H8S2110B RENESAS [Renesas Technology Corp], H8S2110B Datasheet - Page 108

• Manufacturer Part Number: H8S2110B
• Description: Renesas 16-Bit Single-Chip Microcomputer Renesas H8S Family/H8S/2100 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 5 Interrupt Controller
5.3.6
The ISR register is a flag register that indicates the status of IRQ7 to IRQ0 interrupt requests.
Note:
5.3.7
The KMIMRA, KMIMR, and WUEMRB registers enable or disable key-sensing interrupt inputs
(KIN15 to KIN0), and wake-up event interrupt inputs (WUE7 to WUE0).
Rev. 2.00 Mar 21, 2006 page 70 of 518
REJ09B0299-0200
Bit
7
6
5
4
3
2
1
0
Bit
7
6
5
4
3
2
1
0
KMIMRA
*
Only 0 can be written, for flag clearing.
Bit Name
IRQ7F
IRQ6F
IRQ5F
IRQ4F
IRQ3F
IRQ2F
IRQ1F
IRQ0F
Bit Name
KMIMR15
KMIMR14
KMIMR13
KMIMR12
KMIMR11
KMIMR10
KMIMR9
KMIMR8
IRQ Status Register (ISR)
Keyboard Matrix Interrupt Mask Registers (KMIMRA, KMIMR) and
Wake-Up Event Interrupt Mask Register (WUEMRB)
Initial Value
0
0
0
0
0
0
0
0
Initial Value
1
1
1
1
1
1
1
1
R/W
R/(W) *
R/(W) *
R/(W) *
R/(W) *
R/(W) *
R/(W) *
R/(W) *
R/(W) *
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
[Setting condition]
When the interrupt source selected by the
ISCR registers occurs
[Clearing conditions]
When reading IRQnF flag when IRQnF = 1,
then writing 0 to IRQnF flag
When interrupt exception handling is executed
when low-level detection is set and IRQn input
is high
When IRQn interrupt exception handling is
executed when falling-edge, rising-edge, or
both-edge detection is set
Description
Keyboard Matrix Interrupt Mask 15 to 8
These bits enable or disable a key-sensing
input interrupt request (KIN15 to KIN8).
0: Enables a key-sensing input interrupt
request
1: Disables a key-sensing input interrupt
request
(n = 7 to 0)