H8S2110B RENESAS [Renesas Technology Corp], H8S2110B Datasheet - Page 80

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H8S2110B

Manufacturer Part Number
H8S2110B
Description
Renesas 16-Bit Single-Chip Microcomputer Renesas H8S Family/H8S/2100 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Section 2 CPU
2.7.9
Table 2.13 indicates how effective addresses are calculated in each addressing mode. In normal
mode, the upper 8 bits of the effective address are ignored in order to generate a 16-bit address.
Table 2.13 Effective Address Calculation (1)
Rev. 2.00 Mar 21, 2006 page 42 of 518
REJ09B0299-0200
Register indirect with post-increment or
pre-decrement
• Register indirect with post-increment @ERn+
• Register indirect with pre-decrement @-ERn
Register direct (Rn)
Register indirect (@ERn)
Addressing Mode and Instruction Format
Effective Address Calculation
Operand Size
Byte
Word
Longword
Sign extension
Effective Address Calculation
General register contents
General register contents
General register contents
General register contents
1, 2, or 4
1, 2, or 4
Operand is general register contents.
Effective Address (EA)

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