H8S2110B RENESAS [Renesas Technology Corp], H8S2110B Datasheet - Page 207

• Manufacturer Part Number: H8S2110B
• Description: Renesas 16-Bit Single-Chip Microcomputer Renesas H8S Family/H8S/2100 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

9.7.3
If a compare-match occurs during the state after an OCRA or OCRB write cycle, the write takes
priority and the compare-match signal is disabled. Figure 9.19 shows the timing for this type of
conflict.
If automatic addition of OCRAR and OCRAF to OCRA is selected, and a compare-match occurs
in the cycle following the OCRA, OCRAR, and OCRAF write cycle, the OCRA, OCRAR and
OCRAF write takes priority and the compare-match signal is disabled. Consequently, the result of
the automatic addition is not written to OCRA. Figure 9.20 shows the timing for this type of
conflict.
Conflict between OCR Write and Compare-Match
Figure 9.19 Conflict between OCR Write and Compare-Match
φ
Address
Internal write
signal
FRC
OCR
Compare-match
signal
(When Automatic Addition Function Is Not Used)
Write cycle of OCR
T 1
OCR address
T 2
N
N
Section 9 16-Bit Free-Running Timer (FRT)
Rev. 2.00 Mar 21, 2006 page 169 of 518
Write data
M
N + 1
Disabled
REJ09B0299-0200