H8S2110B RENESAS [Renesas Technology Corp], H8S2110B Datasheet - Page 239

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H8S2110B

Manufacturer Part Number
H8S2110B
Description
Renesas 16-Bit Single-Chip Microcomputer Renesas H8S Family/H8S/2100 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
10.8
TMR_0, TMR_1, and TMR_Y can generate three types of interrupts: CMIA, CMIB, and OVI.
TMR_X can generate an ICIX interrupt. Table 10.5 shows the interrupt sources and priorities.
Each interrupt source can be enabled or disabled independently by interrupt enable bits in TCR or
TCSR. Independent signals are sent to the interrupt controller for each interrupt.
Table 10.5 Interrupt Sources of 8-Bit Timers TMR_0, TMR_1, TMR_Y, and TMR_X
10.9
10.9.1
If a counter clear signal is generated during the T
10.13, clearing takes priority and the counter write is not performed.
Channel Name
TMR_0
TMR_1
TMR_Y
TMR_X
Usage Notes
Conflict between TCNT Write and Counter Clear
Interrupt Sources
CMIA0
CMIB0
OVI0
CMIA1
CMIB1
OVI1
CMIAY
CMIBY
OVIY
ICIX
Interrupt Source
TCORA_0 compare-match
TCORB_0 compare-match
TCNT_0 overflow
TCORA_1 compare-match
TCORB_1 compare-match
TCNT_1 overflow
TCORA_Y compare-match
TCORB_Y compare-match
TCNT_Y overflow
Input capture
2
state of a TCNT write cycle as shown in figure
Interrupt
Flag
CMFA
CMFB
OVF
CMFA
CMFB
OVF
CMFA
CMFB
OVF
ICF
Rev. 2.00 Mar 21, 2006 page 201 of 518
Interrupt
Priority
High
Low
Section 10 8-Bit Timer (TMR)
REJ09B0299-0200

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