H8S2110B RENESAS [Renesas Technology Corp], H8S2110B Datasheet - Page 471

• Manufacturer Part Number: H8S2110B
• Description: Renesas 16-Bit Single-Chip Microcomputer Renesas H8S Family/H8S/2100 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

This LSI incorporates a clock pulse generator, which generates the system clock ( ), bus master
clock, and internal clock.
The clock pulse generator consists of an oscillator, duty correction circuit, clock select circuit,
medium-speed clock divider, bus master clock select circuit, subclock input circuit, and waveform
forming circuit. Figure 18.1 shows a block diagram of the clock pulse generator.
The bus master clock is selected as either high-speed mode or medium-speed mode by software
according to the settings of the SCK2 to SCK0 bits in the standby control register. For details on
the standby control register, refer to section 19.1.1, Standby Control Register (SBYCR).
The subclock input is controlled by software according to the EXCLE bit setting in the low power
control register. For details on the low power control register, refer to section 19.1.2, Low Power
Control Register (LPWRCR).
EXTAL
XTAL
EXCL
input circuit
Subclock
Oscillator
Figure 18.1 Block Diagram of Clock Pulse Generator
Section 18 Clock Pulse Generator
Waveform
correction
forming
circuit
circuit
Duty
count clock
φSUB
WDT_1
Clock select
circuit
System clock
to φ pin
Rev. 2.00 Mar 21, 2006 page 433 of 518
speed clock
Medium-
divider
Section 18 Clock Pulse Generator
Internal clock
to peripheral
modules
φ/2
to φ/32
φ
clock select
Bus master
circuit
REJ09B0299-0200
Bus master clock
to CPU