H8S2110B RENESAS [Renesas Technology Corp], H8S2110B Datasheet - Page 257

• Manufacturer Part Number: H8S2110B
• Description: Renesas 16-Bit Single-Chip Microcomputer Renesas H8S Family/H8S/2100 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

11.6.2
If a timer counter clock pulse is generated during the T2 state of a TCNT write cycle, the write
takes priority and the timer counter is not incremented. Figure 11.7 shows this operation.
11.6.3
If bits CKS2 to CKS0 in TCSR are written to while the WDT is operating, errors could occur in
the incrementation. Software must stop the watchdog timer (by clearing the TME bit to 0) before
changing the values of bits CKS2 to CKS0.
11.6.4
If the mode is switched from watchdog timer to interval timer, while the WDT is operating, errors
could occur in the incrementation. Software must stop the watchdog timer (by clearing the TME
bit to 0) before switching the mode.
Conflict between Timer Counter (TCNT) Write and Increment
Changing Values of CKS2 to CKS0 Bits
Switching between Watchdog Timer Mode and Interval Timer Mode
φ
Address
Internal write signal
TCNT input clock
TCNT
Figure 11.7 Conflict between TCNT Write and Increment
TCNT write cycle
T
1
N
T
2
Rev. 2.00 Mar 21, 2006 page 219 of 518
Section 11 Watchdog Timer (WDT)
Counter write data
M
REJ09B0299-0200