H8S2110B RENESAS [Renesas Technology Corp], H8S2110B Datasheet - Page 396

• Manufacturer Part Number: H8S2110B
• Description: Renesas 16-Bit Single-Chip Microcomputer Renesas H8S Family/H8S/2100 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 15 Host Interface LPC Interface (LPC)
Figure 15.1 shows a block diagram of the LPC.
Rev. 2.00 Mar 21, 2006 page 358 of 518
REJ09B0299-0200
LAD0–
LAD3
Legend:
HICR0 to HICR3: Host interface control registers 0 to 3
LADR3H, 3L: LPC channel 3 address register 3H and 3L
IDR1 to IDR3: Input data registers 1 to 3
ODR1 to DOR3: Output data registers 1 to 3
STR1 to STR3: Status registers 1 to 3
TWR1–15
TWR1–15
TWR0MW
TWR0SW
Cycle detection
Serial
Serial
SYNC output
parallel conversion
parallel conversion
H'0060/64
H'0062/66
LADR3
ODR3
ODR2
ODR1
STR3
STR2
STR1
IDR3
IDR2
IDR1
Figure 15.1 Block Diagram of LPC
Address match
Module data bus
Internal interrupt
Control logic
Parallel
SIRQCR0
SIRQCR1
control
HICR0
HICR1
HICR2
HICR3
HISEL
TWR0MW: Two-way register 0MW
TWR0SW: Two-way register 0SW
TWR1 to TWR15: Two-way data registers 1 to 15
SERIRQ0, 1: SERIEQ control registers 0 and 1
HISEL: Host interface select register
serial conversion
LSCIE
LSCIB
LSCI input
LSMIE
LSMIB
LSMI input
PMEE
PMEB
PME input
IBFI1
IBFI2
IBFI3
ERRI
PB1 I/O
PB0 I/O
P80 I/O
SERIRQ
CLKRUN
LPCPD
LFRAME
LRESET
LCLK
LSCI
LSMI
PME
GA20