H8S2110B RENESAS [Renesas Technology Corp], H8S2110B Datasheet - Page 199

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H8S2110B

Manufacturer Part Number
H8S2110B
Description
Renesas 16-Bit Single-Chip Microcomputer Renesas H8S Family/H8S/2100 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
9.5.3
FRC can be cleared when compare-match A occurs. Figure 9.6 shows the timing of this operation.
9.5.4
The rising or falling edge can be selected for the input capture input timing by the IEDGA to
IEDGD bits in TCR. Figure 9.7 shows the usual input capture timing when the rising edge is
selected.
φ
Compare-match
A signal
FRC
φ
Input capture
input pin
Input capture signal
Input Capture Input Timing
FRC Clear Timing
Figure 9.7 Input Capture Input Signal Timing (Usual Case)
Figure 9.6 Clearing of FRC by Compare-Match A Signal
N
Section 9 16-Bit Free-Running Timer (FRT)
Rev. 2.00 Mar 21, 2006 page 161 of 518
H'0000
REJ09B0299-0200

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