H8S2110B RENESAS [Renesas Technology Corp], H8S2110B Datasheet - Page 427

• Manufacturer Part Number: H8S2110B
• Description: Renesas 16-Bit Single-Chip Microcomputer Renesas H8S Family/H8S/2100 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

15.3.9
HISEL selects the function of bits 7 to 4 in STR3 and specifies the output of the host interrupt
request signal of each frame.
Bit
7
6
5
4
3
2
1
0
Bit Name Initial Value Slave Host Description
SELSTR3 0
SELIRQ11
SELIRQ10
SELIRQ9
SELIRQ6
SELSMI
SELIRQ12
SELIRQ1
Host Interface Select Register (HISEL)
0
0
0
0
0
1
1
W
W
W
W
W
W
W
W
R/W
—
—
—
—
—
—
—
—
Selects the function of bits 7 to 4 in STR3 in
combination with the TWRE bit in LADR3L. See
description on STR3 in section 15.3.7, Status
Registers 1 to 3 (STR1 to STR3), for details.
0: Bits 7 to 4 in STR3 are status bits of the host
1: [When TWRE = 1]
SERIRQ Output Select
Selects the pin output status of host interrupt
requests (HIRQ11, HIRQ10, HIRQ9, HIRQ6, SMI,
HIRQ12, and HIRQ1) of the LPC.
0: [When host interrupt request is cleared]
1: [When host interrupt request is cleared]
STR3 Register Function Select 3
interface.
Bits 7 to 4 in STR3 are status bits of the host
interface.
[When TWRE = 0]
Bits 7 to 4 in STR3 are user bits.
SERIRQ pin output is in the high-impedance
state.
[When host interrupt request is set]
SERIRQ pin output is 0.
SERIRQ pin output is 0.
[When host interrupt request is set]
SERIRQ pin output is in the high-impedance
state.
Section 15 Host Interface LPC Interface (LPC)
Rev. 2.00 Mar 21, 2006 page 389 of 518
REJ09B0299-0200