H8S2110B RENESAS [Renesas Technology Corp], H8S2110B Datasheet - Page 268

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H8S2110B

Manufacturer Part Number
H8S2110B
Description
Renesas 16-Bit Single-Chip Microcomputer Renesas H8S Family/H8S/2100 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Section 12 Serial Communication Interface (SCI)
Bit
4
3
2
1
0
Note: * Only 0 can be written, to clear the flag.
Rev. 2.00 Mar 21, 2006 page 230 of 518
REJ09B0299-0200
Bit Name
FER
PER
TEND
MPB
MPBT
Initial Value
0
0
1
0
0
R/W
R/(W) * Framing Error
R/(W) * Parity Error
R
R
R/W
Description
[Setting condition]
When the stop bit is 0
[Clearing condition]
When 0 is written to FER after reading FER = 1
In 2-stop-bit mode, only the first stop bit is checked.
[Setting condition]
When a parity error is detected during reception
[Clearing condition]
When 0 is written to PER after reading PER = 1
Transmit End
[Setting conditions]
[Clearing condition]
When 0 is written to TDRE after reading TDRE = 1
Multiprocessor Bit
MPB stores the multiprocessor bit in the receive
frame. When the RE bit in SCR is cleared to 0 its
previous state is retained.
MPBT stores the multiprocessor bit to be added to
the transmit frame.
Multiprocessor Bit Transfer
When the TE bit in SCR is 0
When TDRE = 1 at transmission of the last bit
of a 1-byte serial transmit character

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