H8S2110B RENESAS [Renesas Technology Corp], H8S2110B Datasheet - Page 326

• Manufacturer Part Number: H8S2110B
• Description: Renesas 16-Bit Single-Chip Microcomputer Renesas H8S Family/H8S/2100 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 13 I
13.3.6
ICSR consists of status flags. Also see tables 13.4 and 13.5.
Bit Bit Name
7
6
5
Rev. 2.00 Mar 21, 2006 page 288 of 518
REJ09B0299-0200
ESTP
STOP
IRTR
I
2
C Bus Status Register (ICSR)
2
C Bus Interface (IIC)
Initial Value R/W
0
0
0
R/(W) * Error Stop Condition Detection Flag
R/(W) * Normal Stop Condition Detection Flag
R/(W) * I
Description
This bit is valid in I
[Setting condition]
When a stop condition is detected during frame transfer.
[Clearing conditions]
This bit is valid in I
[Setting condition]
When a stop condition is detected after frame transfer
completion.
[Clearing conditions]
Flag
Indicates that the I
request to the CPU, and the source is completion of
reception/transmission of one frame in continuous
transmission/reception. When the IRTR flag is set to 1, the
IRIC flag is also set to 1 at the same time.
[Setting conditions]
I
Master mode or clocked synchronous serial format mode
with I
[Clearing conditions]
2
2
C Bus Interface Continuous Transfer Interrupt Request
C bus format slave mode:
When 0 is written in ESTP after reading ESTP = 1
When the IRIC flag in ICCR is cleared to 0
When 0 is written in STOP after reading STOP = 1
When the IRIC flag is cleared to 0
When the ICDRE or ICDRF flag in ICDR is set to 1
when AASX = 1
When the ICDRE or ICDRF flag is set to 1
When 0 is written after reading IRTR = 1
When the IRIC flag is cleared to 0 while ICE is 1
2
C bus format:
2
2
2
C bus format slave mode.
C bus format slave mode.
C bus interface has issued an interrupt