H8S2110B RENESAS [Renesas Technology Corp], H8S2110B Datasheet - Page 468

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H8S2110B

Manufacturer Part Number
H8S2110B
Description
Renesas 16-Bit Single-Chip Microcomputer Renesas H8S Family/H8S/2100 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Section 17 ROM
The FLMCR1, FLMCR2, EBR1, and EBR2 settings are retained, but program mode or erase
mode is aborted at the point at which the error occurred. Program mode or erase mode cannot be
entered by setting the P or E bit to 1. However, because the PV and EV bit settings are retained, a
transition to verify mode can be made. The error protection state can be cancelled by a reset or in
hardware standby mode.
17.10
In order to give the highest priority to programming/erasing operations, disable all interrupts
including NMI input during flash memory programming/erasing (the P or E bit in FlMCR1 is set
to 1) or boot program execution*
1. If an interrupt is generated during programming/erasing, operation in accordance with the
2. CPU runaway may occur because normal vector reading cannot be performed in interrupt
3. If an interrupt occurs during boot program execution, the normal boot mode sequence cannot
Notes: 1. Interrupt requests must be disabled inside and outside the CPU until the programming
Rev. 2.00 Mar 21, 2006 page 430 of 518
REJ09B0299-0200
program/erase algorithm is not guaranteed.
exception handling during programming/erasing*
be executed.
2. The vector may not be read correctly for the following two reasons:
Interrupts during Flash Memory Programming/Erasing
control program has completed programming.
If flash memory is read while being programmed or erased (while the P or E bit in
FLMCR1 is set to 1), correct read data will not be obtained (undefined values will be
returned).
If the interrupt entry in the vector table has not been programmed yet, interrupt
exception handling will not be executed correctly.
1
.
2
.

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