H8S2110B RENESAS [Renesas Technology Corp], H8S2110B Datasheet - Page 346

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H8S2110B

Manufacturer Part Number
H8S2110B
Description
Renesas 16-Bit Single-Chip Microcomputer Renesas H8S Family/H8S/2100 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Section 13 I
Rev. 2.00 Mar 21, 2006 page 308 of 518
REJ09B0299-0200
Figure 13.14 Sample Flowchart for Operations in Master Receive Mode
2
C Bus Interface (IIC)
No
No
Read IRIC flag in ICCR
Clear IRIC flag in ICCR
Clear IRIC flag in ICCR
Clear IRIC flag in ICCR
Read IRIC flag in ICCR
Set ACKB = 0 in ICSR
Set HNDS = 0 in ICXR
Set ACKB = 1 in ICSR
Set TRS = 0 in ICCR
Set WAIT = 0 in ICMR
Set TRS = 1 in ICCR
Set WAIT = 0 in ICMR
Slave receive mode
Set BBSY = 0 and
SCP = 0 in ICCR
(Receiving a Single Byte) (WAIT = 1)
Read ICDR
Read ICDR
IRIC = 1?
IRIC = 1?
End
Yes
Yes
[1] Select receive mode.
[2] Start receiving. The first read
[3] Wait for a receive wait
[7] Set acknowledge data for
[9] Set TRS for stop condition issuance
[11] Clear IRIC flag.
[12] Wait for 1 byte to be received.
[15] Clear wait mode.
[16] Read the last receive data
[17] Generate stop condition
is a dummy read.
(Set IRIC at the fall of the 8th clock)
the last reception.
(to end the wait insertion)
(Set IRIC at the rise of the 9th clock)
Clear IRIC flag.
( IRIC flag should be cleared to 0
after setting WAIT = 0.)

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