H8S2110B RENESAS [Renesas Technology Corp], H8S2110B Datasheet - Page 251

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H8S2110B

Manufacturer Part Number
H8S2110B
Description
Renesas 16-Bit Single-Chip Microcomputer Renesas H8S Family/H8S/2100 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Notes: 1. Only 0 can be written, to clear the flag.
Bit
4
3
2
1
0
Bit Name Initial Value R/W
PSS
RST/NMI 0
CKS2
CKS1
CKS0
2. When OVF is polled with the interval timer interrupt disabled, OVF = 1 must be read at
least twice.
0
0
0
0
R/W
R/W
R/W
R/W
R/W
Description
Selects the clock source to be input to TCNT.
0: Counts the divided cycle of —based prescaler (PSM)
1: Counts the divided cycle of SUB—based prescaler
(PSS)
Reset or NMI
Selects to request an internal reset or an NMI interrupt
when TCNT has overflowed.
0: An NMI interrupt is requested
1: An internal reset is requested
Clock Select 2 to 0
Selects the clock source to be input to TCNT. The
overflow cycle for
enclosed in parentheses.
When PSS = 0:
000: /2 (frequency: 51.2 s)
001: /64 (frequency: 1.64 ms)
010: /128 (frequency: 3.28 ms)
011: /512 (frequency: 13.1 ms)
100: /2048 (frequency: 52.4 ms)
101: /8192 (frequency: 209.7 ms)
110: /32768 (frequency: 0.84 s)
111: /131072 (frequency: 3.36 s)
When PSS = 1:
000: SUB/2 (cycle: 15.6 ms)
001: SUB/4 (cycle: 31.3 ms)
010: SUB/8 (cycle: 62.5 ms)
011: SUB/16 (cycle: 125 ms)
100: SUB/32 (cycle: 250 ms)
101: SUB/64 (cycle: 500 ms)
110: SUB/128 (cycle: 1 s)
111: /256 (cycle: 2 s)
Prescaler Select
Rev. 2.00 Mar 21, 2006 page 213 of 518
= 10 MHz and SUB = 32.768 kHz is
Section 11 Watchdog Timer (WDT)
REJ09B0299-0200

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