H8S2110B RENESAS [Renesas Technology Corp], H8S2110B Datasheet - Page 484

no-image

H8S2110B

Manufacturer Part Number
H8S2110B
Description
Renesas 16-Bit Single-Chip Microcomputer Renesas H8S Family/H8S/2100 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Section 19 Power-Down Modes
Bit
7
6
5
4
3
2
1
0
Notes: 1. Do not clear this bit to 0.
19.2
Figure 19.1 shows the enabled mode transition diagram. The mode transition from program
execution state to program halt state is performed by the SLEEP instruction. The mode transition
from program halt state to program execution state is performed by an interrupt. The STBY input
causes a mode transition from any state to hardware standby mode. The RES input causes a mode
transition from a state other than hardware standby mode to the reset state. Table 19.2 shows the
LSI internal states in each operating mode.
Rev. 2.00 Mar 21, 2006 page 446 of 518
REJ09B0299-0200
MSTPCRL
Bit Name Initial Value R/W
MSTP7
MSTP6
MSTP5
MSTP4
MSTP3
MSTP2
MSTP1
MSTP0
2. This bit can be read from or written to, however, operation is not affected.
Mode Transitions and LSI States
1 *
1
1 *
1
1
1
1 *
1
1
1
2
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Corresponding Module
Serial communication interface_1 (SCI_1)
I
I
Keyboard buffer controller, keyboard matrix interrupt mask
register (KMIMR), keyboard matrix interrupt mask register A
(KMIMRA), port 6 pull-up MOS control register (KMPCR)
Host interface (LPC), wake-up event interrupt mask register
B (WUEMRB)
2
2
C bus interface_0 (IIC_0)
C bus interface_1 (IIC_1)

Related parts for H8S2110B