H8S2110B RENESAS [Renesas Technology Corp], H8S2110B Datasheet - Page 61

• Manufacturer Part Number: H8S2110B
• Description: Renesas 16-Bit Single-Chip Microcomputer Renesas H8S Family/H8S/2100 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Bit
7
6
5
4
3
2
1
0
Bit Name
I
UI
H
U
N
Z
V
C
Initial Value
1
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
R/W Description
R/W Interrupt Mask Bit
R/W User Bit or Interrupt Mask Bit
R/W Half-Carry Flag
R/W User Bit
R/W Negative Flag
R/W Zero Flag
R/W Overflow Flag
R/W Carry Flag
Masks interrupts other than NMI when set to 1. NMI is
accepted regardless of the I bit setting. The I bit is set to 1
at the start of an exception-handling sequence. For details,
refer to section 5, Interrupt Controller.
Can be written to and read from by software using the
LDC, STC, ANDC, ORC, and XORC instructions.
When the ADD.B, ADDX.B, SUB.B, SUBX.B, CMP.B or
NEG.B instruction is executed, this flag is set to 1 if there is
a carry or borrow at bit 3, and cleared to 0 otherwise. When
the ADD.W, SUB.W, CMP.W, or NEG.W instruction is
executed, the H flag is set to 1 if there is a carry or borrow
at bit 11, and cleared to 0 otherwise. When the ADD.L,
SUB.L, CMP.L, or NEG.L instruction is executed, the H flag
is set to 1 if there is a carry or borrow at bit 27, and cleared
to 0 otherwise.
Can be written to and read from by software using the
LDC, STC, ANDC, ORC, and XORC instructions.
Stores the value of the most significant bit of data as a sign
bit.
Set to 1 to indicate zero data, and cleared to 0 to indicate
non-zero data.
Set to 1 when an arithmetic overflow occurs, and cleared to
0 otherwise.
Set to 1 when a carry occurs, and cleared to 0 otherwise.
Used by
The carry flag is also used as a bit accumulator by bit
manipulation instructions.
Add instructions, to indicate a carry
Subtract instructions, to indicate a borrow
Shift and rotate instructions, to indicate a carry
Rev. 2.00 Mar 21, 2006 page 23 of 518
REJ09B0299-0200
Section 2 CPU