H8S2110B RENESAS [Renesas Technology Corp], H8S2110B Datasheet - Page 202

• Manufacturer Part Number: H8S2110B
• Description: Renesas 16-Bit Single-Chip Microcomputer Renesas H8S Family/H8S/2100 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 9 16-Bit Free-Running Timer (FRT)
9.5.7
The output compare flag, OCFA or OCFB, is set to 1 by a compare-match signal generated when
the FRC value matches the OCRA or OCRB value. This compare-match signal is generated at the
last state in which the two values match, just before FRC increments to a new value. When the
FRC and OCRA or OCRB value match, the compare-match signal is not generated until the next
cycle of the clock source. Figure 9.12 shows the timing of setting the OCFA or OCFB flag.
9.5.8
The FRC overflow flag (OVF) is set to 1 when FRC overflows (changes from H'FFFF to H'0000).
Figure 9.13 shows the timing of setting the OVF flag.
Rev. 2.00 Mar 21, 2006 page 164 of 518
REJ09B0299-0200
φ
FRC
OCRA, OCRB
Compare-match
signal
OCFA, OCFB
Timing of Output Compare Flag (OCF) setting
Timing of FRC Overflow Flag Setting
Figure 9.12 Timing of Output Compare Flag (OCFA or OCFB) Setting
φ
FRC
Overflow signal
OVF
Figure 9.13 Timing of Overflow Flag (OVF) Setting
N
H'FFFF
N
H'0000
N + 1