H8S2110B RENESAS [Renesas Technology Corp], H8S2110B Datasheet - Page 195
H8S2110B
Manufacturer Part Number
H8S2110B
Description
Renesas 16-Bit Single-Chip Microcomputer Renesas H8S Family/H8S/2100 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.H8S2110B.pdf
(559 pages)
- Current page: 195 of 559
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9.3.9
TOCR enables output from the output compare pins, selects the output levels, switches access
between output compare registers A and B, controls the ICRD and OCRA operating modes, and
switches access to input capture registers A, B, and C.
Bit
1
0
Bit
7
6
5
Bit Name
CKS1
CKS0
Bit Name
ICRDMS
OCRAMS
ICRS
Timer Output Compare Control Register (TOCR)
Initial Value
0
0
Initial Value
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
Clock Select 1, 0
Select clock source for FRC.
00: /2 internal clock source
01: /8 internal clock source
10: /32 internal clock source
11: External clock source (counting at FTCI rising edge)
Specifies whether ICRD is used in the normal operating
mode or in the operating mode using OCRDM.
0: The normal operating mode is specified for ICRD
1: The operating mode using OCRDM is specified for
ICRD
Specifies whether OCRA is used in the normal
operating mode or in the operating mode using OCRAR
and OCRAF.
0: The normal operating mode is specified for OCRA
1: The operating mode using OCRAR and OCRAF is
specified for OCRA
The same addresses are shared by ICRA and OCRAR,
by ICRB and OCRAF, and by ICRC and OCRDM. The
ICRS bit determines which registers are selected when
the shared addresses are read from or written to. The
operation of ICRA, ICRB, and ICRC is not affected.
0: ICRA, ICRB, and ICRC are selected
1: OCRAR, OCRAF, and OCRDM are selected
Description
Description
Input Capture D Mode Select
Output Compare A Mode Select
Input Capture Register Select
Section 9 16-Bit Free-Running Timer (FRT)
Rev. 2.00 Mar 21, 2006 page 157 of 518
REJ09B0299-0200
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