H8S2110B RENESAS [Renesas Technology Corp], H8S2110B Datasheet - Page 300

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H8S2110B

Manufacturer Part Number
H8S2110B
Description
Renesas 16-Bit Single-Chip Microcomputer Renesas H8S Family/H8S/2100 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Section 12 Serial Communication Interface (SCI)
12.7
Table 12.10 shows the interrupt sources in serial communication interface. A different interrupt
vector is assigned to each interrupt source, and individual interrupt sources can be enabled or
disabled using the enable bits in SCR.
When the TDRE flag in SSR is set to 1, a TXI interrupt request is generated. When the TEND flag
in SSR is set to 1, a TEI interrupt request is generated.
When the RDRF flag in SSR is set to 1, an RXI interrupt request is generated. When the ORER,
PER, or FER flag in SSR is set to 1, an ERI interrupt request is generated.
A TEI interrupt is requested when the TEND flag is set to 1 while the TEIE bit is set to 1. If a TEI
interrupt and a TXI interrupt are requested simultaneously, the TXI interrupt has priority for
acceptance. However, note that if the TDRE and TEND flags are cleared simultaneously by the
TXI interrupt routine, the SCI cannot branch to the TEI interrupt routine later.
Table 12.10 SCI Interrupt Sources
Channel
1
Rev. 2.00 Mar 21, 2006 page 262 of 518
REJ09B0299-0200
Interrupt Sources
Name
ERI1
RXI1
TXI1
TEI1
Interrupt Source
Receive error
Receive data full
Transmit data empty
Transmit end
Interrupt Flag
ORER, FER, PER
RDRF
TDRE
TEND
Priority
High
Low

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