H8S2110B RENESAS [Renesas Technology Corp], H8S2110B Datasheet - Page 403

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H8S2110B

Manufacturer Part Number
H8S2110B
Description
Renesas 16-Bit Single-Chip Microcomputer Renesas H8S Family/H8S/2100 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Bit
7
HICR1
Bit Name Initial Value Slave Host Description
LPCBSY
0
R
R/W
LPC Busy
Indicates that the host interface is processing a
transfer cycle.
0: Host interface is in transfer cycle wait state
[Clearing conditions]
1: Host interface is performing transfer cycle
processing
[Setting condition]
Match of cycle type and address
Bus idle, or transfer cycle not subject to
processing is in progress
Cycle type or address indeterminate during
transfer cycle
LPC hardware reset or LPC software reset
LPC hardware shutdown or LPC software
shutdown
Forced termination (abort) of transfer cycle
subject to processing
Normal termination of transfer cycle subject to
processing
Section 15 Host Interface LPC Interface (LPC)
Rev. 2.00 Mar 21, 2006 page 365 of 518
REJ09B0299-0200

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