H8S2110B RENESAS [Renesas Technology Corp], H8S2110B Datasheet - Page 384

• Manufacturer Part Number: H8S2110B
• Description: Renesas 16-Bit Single-Chip Microcomputer Renesas H8S Family/H8S/2100 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 14 Keyboard Buffer Controller
14.4.2
In a transmit operation, KCLK (clock) is an output on the keyboard side, and KD (data) is an
output on the chip (system) side. KD outputs a start bit, 8 data bits (LSB-first), an odd parity bit,
and a stop bit, in that order. The KD value is valid when KCLK is high. A sample transmit
processing flowchart is shown in figure 14.5, and the transmit timing in figure 14.6.
Rev. 2.00 Mar 21, 2006 page 346 of 518
REJ09B0299-0200
KCLK
(pin state)
KD
(pin state)
KCLK
(input)
KCLK
(output)
KB7 to KB0
PER
KBS
KBF
Transmit Operation
[1] [2] [3]
Previous data
Start
bit
1
0
2
KB0
Figure 14.4 Receive Timing
1
3
KB1
7
9
Parity bit
10
Receive data
Stop bit
[4] [5]
11
Automatic I/O inhibit
Receive processing/
error handling
Flag cleared
[6]