H8S2110B RENESAS [Renesas Technology Corp], H8S2110B Datasheet - Page 241

• Manufacturer Part Number: H8S2110B
• Description: Renesas 16-Bit Single-Chip Microcomputer Renesas H8S Family/H8S/2100 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

10.9.3
If a compare-match occurs during the T
TCOR write takes priority and the compare-match signal is disabled. With TMR_X, a TICR input
capture conflicts with a compare-match in the same way as with a write to TCORC. In this case
also, the input capture takes priority and the compare-match signal is disabled.
10.9.4
If compare-matches A and B occur at the same time, the operation follows the output status that is
defined for compare-match A or B, according to the priority of the timer output shown in table
10.6.
Table 10.6 Timer Output Priorities
Output Setting
Toggle output
1 output
0 output
No change
Conflict between Compare-Matches A and B
Conflict between TCOR Write and Compare-Match
Address
Internal write signal
TCNT
TCOR
Compare-match signal
Figure 10.15 Conflict between TCOR Write and Compare-Match
2
TCOR write cycle by CPU
T 1
state of a TCOR write cycle as shown in figure 10.15, the
Priority
High
Low
N
N
TCOR address
T 2
Rev. 2.00 Mar 21, 2006 page 203 of 518
TCOR write data
Disabled
N + 1
Section 10 8-Bit Timer (TMR)
M
REJ09B0299-0200