H8S2110B RENESAS [Renesas Technology Corp], H8S2110B Datasheet - Page 122

• Manufacturer Part Number: H8S2110B
• Description: Renesas 16-Bit Single-Chip Microcomputer Renesas H8S Family/H8S/2100 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 5 Interrupt Controller
5.7
5.7.1
This LSI can determine the specific address prefetch by the CPU to generate an address break
interrupt by setting ABRKCR and BAR. If an address break interrupt is generated, the address
break interrupt exception handling is performed.
With this function, the execution start point of a program containing a bug is detected and
execution is branched to the correcting program.
5.7.2
Figure 5.8 shows a block diagram of the address break.
5.7.3
If the CPU prefetches an address specified in BAR by setting ABRKCR and BAR, an address
break interrupt can be generated. This address break function generates an interrupt request to the
interrupt controller at prefetch, and determines the priority by the interrupt controller. When an
interrupt is accepted, an interrupt exception handling is activated after the current instruction has
been completed. Note that the interrupt mask control according to the I and UI bits in CCR of the
CPU is invalid to an address break interrupt.
Rev. 2.00 Mar 21, 2006 page 84 of 518
REJ09B0299-0200
Features
Block Diagram
Operation
Address Break
Internal address
(internal signal)
Prefetch signal
Figure 5.8 Address Break Block Diagram
Comparator
BAR
Match
signal
ABRKCR
Control
logic
Address break
interrupt request