H8S2110B RENESAS [Renesas Technology Corp], H8S2110B Datasheet - Page 98

• Manufacturer Part Number: H8S2110B
• Description: Renesas 16-Bit Single-Chip Microcomputer Renesas H8S Family/H8S/2100 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 4 Exception Handling
4.3.2
If an interrupt is accepted after a reset and before the stack pointer (SP) is initialized, the PC and
CCR will not be saved correctly, leading to a program crash. To prevent this, all interrupt requests,
including NMI, are disabled immediately after a reset. Since the first instruction of a program is
always executed immediately after the reset state ends, make sure that this instruction initializes
the stack pointer (example: MOV.L #xx: 32, SP).
4.3.3
After a reset is cancelled, the module stop control registers (MSTPCR) are initialized, and all
modules operate in module stop mode. Therefore, the registers of on-chip peripheral modules
cannot be read from or written to. To read from and write to these registers, clear module stop
mode.
4.4
Interrupts are controlled by the interrupt controller. The sources to start interrupt exception
handling are external interrupt sources (NMI, IRQ7 to IRQ0, KIN15 to KIN0, and WUE7 to
WUE0) and internal interrupt sources from the on-chip peripheral modules. NMI is an interrupt
with the highest priority. For details, refer to section 5, Interrupt Controller.
Interrupt exception handling is conducted as follows:
1. The values in the program counter (PC) and condition code register (CCR) are saved to the
2. A vector address corresponding to the interrupt source is generated, the start address is loaded
4.5
Trap instruction exception handling starts when a TRAPA instruction is executed. Trap instruction
exception handling can be executed at all times in the program execution state.
Trap instruction exception handling is conducted as follows:
1. The values in the program counter (PC) and condition code register (CCR) are saved to the
2. A vector address corresponding to the interrupt source is generated, the start address is loaded
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stack.
from the vector table to the PC, and program execution begins from that address.
stack.
from the vector table to the PC, and program execution starts from that address.
Interrupts after Reset
On-Chip Peripheral Modules after Reset Is Cancelled
Interrupt Exception Handling
Trap Instruction Exception Handling