H8S2110B RENESAS [Renesas Technology Corp], H8S2110B Datasheet - Page 289

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H8S2110B

Manufacturer Part Number
H8S2110B
Description
Renesas 16-Bit Single-Chip Microcomputer Renesas H8S Family/H8S/2100 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
12.5.2
Figure 12.12 Example of SCI Receive Operation (Example with 8-Bit Data, Multiprocessor
Figure 12.13 shows a sample flowchart for multiprocessor serial data reception. If the MPIE bit
in SCR is set to 1, data is skipped until data with a 1 multiprocessor bit is sent. On receiving data
with a 1 multiprocessor bit, the receive data is transferred to RDR. An RXI interrupt request is
generated at this time. All other SCI operations are the same as in asynchronous mode. Figure
12.12 shows an example of SCI operation for multiprocessor format reception.
MPIE
RDRF
RDR
value
MPIE
RDRF
RDR
value
Multiprocessor Serial Data Reception
1
1
Start
bit
Start
bit
0
0
MPIE = 0
MPIE = 0
D0
D0
ID1
D1
D1
Data (ID1)
Data (ID2)
RXI interrupt
request
(multiprocessor
interrupt)
generated
RXI interrupt
request
(multiprocessor
interrupt)
generated
D7
D7
(a) Data does not match station’s ID
(b) Data matches station’s ID
MPB
Bit, One Stop Bit)
MPB
1
1
RDR data read and
RDRF flag cleared
to 0 in RXI interrupt
handling routine
RDR data read
and RDRF flag
cleared to 0 in
RXI interrupt
handling routine
Stop
bit
Stop
bit
1
1
Section 12 Serial Communication Interface (SCI)
Start
bit
Start
bit
0
0
D0
D0
Rev. 2.00 Mar 21, 2006 page 251 of 518
If not this station’s ID,
MPIE bit is set to 1
again
Matches this station’s ID,
so reception continues, and
data is received in RXI
interrupt service routine
D1
D1
Data (Data 1)
Data (Data 2)
ID2
ID1
D7
D7
MPB
MPB
0
0
RXI interrupt request is
not generated, and RDR
retains its state
Stop
bit
Stop
bit
1
1
MPIE bit set to 1
again
Idle state
(mark state)
Idle state
(mark state)
REJ09B0299-0200
Data 2
1
1

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