H8S2110B RENESAS [Renesas Technology Corp], H8S2110B Datasheet - Page 256

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H8S2110B

Manufacturer Part Number
H8S2110B
Description
Renesas 16-Bit Single-Chip Microcomputer Renesas H8S Family/H8S/2100 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Section 11 Watchdog Timer (WDT)
11.6
11.6.1
The watchdog timer’s registers, TCNT and TCSR differ from other registers in being more
difficult to write to. The procedures for writing to and reading from these registers are given
below.
Writing to TCNT and TCSR (Example of WDT_0): These registers must be written to by a
word transfer instruction. They cannot be written to by a byte transfer instruction.
TCNT and TCSR both have the same write address. Therefore, satisfy the relative condition
shown in figure 11.6 to write to TCNT or TCSR. To write to TCNT, the upper bytes must contain
the value H'5A and the lower bytes must contain the write data before the transfer instruction
execution. To write to TCSR, the upper bytes must contain the value H'A5 and the lower bytes
must contain the write data.
Reading from TCNT and TCSR (Example of WDT_0): These registers are read in the same
way as other registers. The read address is H'FFA8 for TCSR and H'FFA9 for TCNT.
Rev. 2.00 Mar 21, 2006 page 218 of 518
REJ09B0299-0200
<TCSR write>
<TCNT write>
Usage Notes
Notes on Register Access
Address : H'FFA8
Address : H'FFA8
Figure 11.6 Writing to TCNT and TCSR (WDT_0)
0
0
15
15
H'5A
H'A5
8 7
8 7
Write data
Write data
0
0

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