AU80610004653AAS LBMG Intel, AU80610004653AAS LBMG Datasheet - Page 139

• Manufacturer Part Number: AU80610004653AAS LBMG
• Description: MPU, ATOM PROCESSOR, N450, FC-BGA8
• Manufacturer: Intel
• Series: ATOM - N400r

Specifications of AU80610004653AAS LBMG

• Core Size: 64bit
• Cpu Speed: 1.66GHz
• Digital Ic Case Style: BGA
• No. Of Pins: 559
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Processor Configuration Registers
1.9.23
Datasheet
31:15
13:5
3:2
2:1
Bit
Bit
14
1
0
4
3
0
Access
Access
DEVEN - Device Enable
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
Allows for enabling/disabling of PCI devices and functions that are within the processor.
The table below the bit definitions describes the behavior of all combinations of
transactions to devices controlled by this register.
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Default
Default
00000h
Value
Value
000h
00b
00b
0b
0b
0b
1b
1b
1b
RST/PWR
RST/PWR
Core
Core
Core
Core
Core
Core
Core
Core
Core
Core
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Internal Graphics Engine Function 1 (D2F1EN):
If Device 2 Function 0 is disabled and hidden, then
Device 2 Function 1 is also disabled and hidden
independent of the state of this bit.
If this component is not capable of Dual Independent
Display (CAPID0[40] = 1) then this bit is hardwired to 0b
to hide Device 2 Function 1.
Internal Graphics Engine Function 0 (D2F0EN):
If this processor does not have internal graphics
capability (CAPID0[46] = 1) then Device 2 Function 0 is
disabled and hidden independent of the state of this bit.
Reserved
Host Bridge (D0EN):
therefore hardwired to 1.
Bus 0 Device 0 Function 0 may not be disabled and is
0/2/0/PCI
54-57h
00000019h
32 bits
RO;
0: Bus 0 Device 2 Function 1 is disabled and hidden
1: Bus 0 Device 2 Function 1 is enabled and visible
0: Bus 0 Device 2 Function 0 is disabled and hidden
1: Bus 0 Device 2 Function 0 is enabled and visible
Description
Description
139