AU80610004653AAS LBMG Intel, AU80610004653AAS LBMG Datasheet - Page 163
AU80610004653AAS LBMG
Manufacturer Part Number
AU80610004653AAS LBMG
Description
MPU, ATOM PROCESSOR, N450, FC-BGA8
Manufacturer
Intel
Series
ATOM - N400r
Datasheet
1.AU80610004653AAS_LBMG.pdf
(171 pages)
Specifications of AU80610004653AAS LBMG
Core Size
64bit
Cpu Speed
1.66GHz
Digital Ic Case Style
BGA
No. Of Pins
559
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Processor Configuration Registers
Datasheet
31:15
13:5
2:1
Bit
14
4
3
0
Access
RO
RO
RO
RO
RO
RO
RO
Default
00000h
Value
000h
00b
0b
1b
1b
1b
RST/PWR
Core
Core
Core
Core
Core
Core
Core
Reserved
Chap Enable (D7EN):
0: Bus 0 Device 7 is disabled and not visible.
Device 7 is enabled and visible. Non-production BIOS
code should provide a setup option to enable Bus 0
Device 7. When enabled, Bus 0 Device 7 must be
initialized in accordance to standard PCI device
initialization procedures.
Reserved
Internal Graphics Engine Function 1 (D2F1EN):
If Device 2 Function 0 is disabled and hidden, then
Device 2 Function 1 is also disabled and hidden
independent of the state of this bit.
If this component is not capable of Dual Independent
Display (CAPID0[78] = 1) then this bit is hardwired to 0b
to hide Device 2 Function 1.
Internal Graphics Engine Function 0 (D2F0EN):
If this processor does not have internal graphics
capability (CAPID0[46] = 1) then Device 2 Function 0 is
disabled and hidden independent of the state of this bit.
Reserved
Host Bridge (D0EN):
therefore hardwired to 1.
Bus 0 Device 0 Function 0 may not be disabled and is
0: Bus 0 Device 2 Function 1 is disabled and hidden
1: Bus 0 Device 2 Function 1 is enabled and visible
0: Bus 0 Device 2 Function 0 is disabled and hidden
1: Bus 0 Device 2 Function 0 is enabled and visible
Description
1: Bus 0
163
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