AU80610004653AAS LBMG Intel, AU80610004653AAS LBMG Datasheet - Page 143
AU80610004653AAS LBMG
Manufacturer Part Number
AU80610004653AAS LBMG
Description
MPU, ATOM PROCESSOR, N450, FC-BGA8
Manufacturer
Intel
Series
ATOM - N400r
Datasheet
1.AU80610004653AAS_LBMG.pdf
(171 pages)
Specifications of AU80610004653AAS LBMG
Core Size
64bit
Cpu Speed
1.66GHz
Digital Ic Case Style
BGA
No. Of Pins
559
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Processor Configuration Registers
1.9.29
1.9.30
Datasheet
15:0
7:4
3:2
Bit
Bit
1
Access
Access
MD - Message Data
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
RW
GDRST – Graphics Debug Reset
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
RW
RO
RO
Default
Default
Value
0000h
Value
00b
0h
0b
RST/PWR
RST/PWR
FLR, Core
FLR, Core
FLR, Core
FLR, Core
Message Data (MESSDATA):
software and used to handle an MSI from the device.
When the device must generate an interrupt request, it
writes a 32-bit value to the memory address specified in
the MA register. The upper 16 bits are always set to 0.
The lower 16 bits are supplied by this register.
Reserved
Graphics Reset Domain (GRDOM):
Graphics Reset Domain
00 – Full Graphics Reset will be performed (both render
and display clock domain resets asserted
01 – Reserved (Illegal Programming)
10 – Reserved (Illegal Programming)
11 – Reserved (Illegal Programming)
Reserved
Base message data pattern assigned by system
0/2/0/PCI
98-99h
0000h
16 bits
0/2/0/PCI
C0h
00h
8 bits
RW;
RO; RW;
Description
Description
143
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