AU80610004653AAS LBMG Intel, AU80610004653AAS LBMG Datasheet - Page 57
AU80610004653AAS LBMG
Manufacturer Part Number
AU80610004653AAS LBMG
Description
MPU, ATOM PROCESSOR, N450, FC-BGA8
Manufacturer
Intel
Series
ATOM - N400r
Datasheet
1.AU80610004653AAS_LBMG.pdf
(171 pages)
Specifications of AU80610004653AAS LBMG
Core Size
64bit
Cpu Speed
1.66GHz
Digital Ic Case Style
BGA
No. Of Pins
559
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Processor Configuration Registers
1.5.25
1.5.26
Datasheet
LAC - Legacy Access Control
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
This 8-bit register controls a fixed DRAM hole from 15-16 MB.
REMAPBASE - Remap Base Address Register
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
15:10
6:0
9:0
Bit
Bit
7
Access
Access
RW-L
RW-L
RO
RO
000000b
Default
Default
Value
Value
3FFh
00h
0b
0/0/0/PCI
97h
00h
8 bits
0/0/0/PCI
98-99h
03FFh
16 bits
RST/PWR
RW-L; RO;
RO; RW-L;
RST/
PWR
Core
Core
Core
Core
Hole Enable (HEN):
This field enables a memory hole in
DRAM space. The DRAM that lies
“behind” this space is not remapped.
0: No memory hole.
1: Memory hole from 15 MB to 16 MB.
Reserved
Reserved
Remap Base Address [35:26]
(REMAPBASE):
The value in this register defines the
lower boundary of the Remap window.
The Remap window is inclusive of this
address. In the decoder A[25:0] of the
Remap Base Address are assumed to be
0's. Thus the bottom of the defined
memory range will be aligned to a 64MB
boundary.
When the value in this register is greater
than the value programmed into the
Remap Limit register, the Remap window
is disabled.
Description
Description
57
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