AU80610004653AAS LBMG Intel, AU80610004653AAS LBMG Datasheet - Page 62

• Manufacturer Part Number: AU80610004653AAS LBMG
• Description: MPU, ATOM PROCESSOR, N450, FC-BGA8
• Manufacturer: Intel
• Series: ATOM - N400r

Specifications of AU80610004653AAS LBMG

• Core Size: 64bit
• Cpu Speed: 1.66GHz
• Digital Ic Case Style: BGA
• No. Of Pins: 559
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

1.5.31
62
TOUUD - Top of Upper Usable DRAM
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
This 16 bit register defines the Top of Upper Usable DRAM.
Configuration software must set this value to TOM minus all EP stolen memory if
reclaim is disabled. If reclaim is enabled, this value must be set to (reclaim limit + 1
byte) 64MB aligned since reclaim limit is 64MB aligned. Address bits 19:0 are assumed
to be 000_0000h for the purposes of address comparison. The Host interface positively
decodes an address towards DRAM if the incoming address is less than the value
programmed in this register and greater than or equal to 4GB.
15:0
Bit
Access
RW-L
Default
0000h
Value
0/0/0/PCI
A2-A3h
0000h
16 bits
RST/PWR
RW-L;
Core
TOUUD (TOUUD):
This register contains bits 35 to 20 of an
address one byte above the maximum
DRAM memory above 4G that is usable
by the operating system. Configuration
software must set this value to TOM
minus all EP stolen memory if reclaim is
disabled. If reclaim is enabled, this value
must be set to (reclaim limit + 1 byte)
64MB aligned since reclaim limit is 64MB
aligned. Address bits 19:0 are assumed
to be 000_0000h for the purposes of
address comparison. The Host interface
positively decodes an address towards
DRAM if the incoming address is less than
the value programmed in this register
and greater than 4 GB.
Processor Configuration Registers
Description
Datasheet