AU80610004653AAS LBMG Intel, AU80610004653AAS LBMG Datasheet - Page 55

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AU80610004653AAS LBMG

Manufacturer Part Number
AU80610004653AAS LBMG
Description
MPU, ATOM PROCESSOR, N450, FC-BGA8
Manufacturer
Intel
Series
ATOM - N400r
Datasheet

Specifications of AU80610004653AAS LBMG

Core Size
64bit
Cpu Speed
1.66GHz
Digital Ic Case Style
BGA
No. Of Pins
559
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Processor Configuration Registers
1.5.23
Datasheet
PAM5 - Programmable Attribute Map 5
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
This register controls the read, write, and shadowing attributes of the BIOS areas from
0E0000h- 0E7FFFh.
7:6
5:4
3:2
1:0
Bit
Access
RW-L
RW-L
RO
RO
Default
Value
00b
00b
00b
00b
0/0/0/PCI
95h
00h
8 bits
RO; RW-L;
RST/
PWR
Core
Core
Core
Core
Reserved
0E4000-0E7FFF Attribute
(HIENABLE):
and write cycles that address the BIOS
area from 0E4000 to 0E7FFF.
00: DRAM Disabled: Accesses are directed
to DMI.
01: Read Only: All reads are serviced by
DRAM. All writes are forwarded to DMI.
10: Write Only: All writes are sent to
DRAM. Reads are serviced by DMI.
11: Normal DRAM Operation: All reads
and writes are serviced by DRAM.
Reserved
0E0000-0E3FFF Attribute
(LOENABLE):
This field controls the steering of read and
write cycles that address the BIOS area
from 0E0000 to 0E3FFF.
00: DRAM Disabled: Accesses are directed
to DMI.
01: Read Only: All reads are serviced by
DRAM. All writes are forwarded to DMI.
10: Write Only: All writes are sent to
DRAM. Reads are serviced by DMI.
11: Normal DRAM Operation: All reads
and writes are serviced by DRAM.
This field controls the steering of read
Description
55

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