AU80610004653AAS LBMG Intel, AU80610004653AAS LBMG Datasheet - Page 3

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AU80610004653AAS LBMG

Manufacturer Part Number
AU80610004653AAS LBMG
Description
MPU, ATOM PROCESSOR, N450, FC-BGA8
Manufacturer
Intel
Series
ATOM - N400r
Datasheet

Specifications of AU80610004653AAS LBMG

Core Size
64bit
Cpu Speed
1.66GHz
Digital Ic Case Style
BGA
No. Of Pins
559
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Contents
1
Datasheet
Processor Configuration Registers ........................................................................... 10
1.1
1.2
1.3
1.4
1.5
Register Terminology ......................................................................................... 10
System Address Map.......................................................................................... 12
1.2.1
1.2.2
1.2.3
1.2.4
1.2.5
1.2.6
1.2.7
1.2.8
I/O Mapped Registers ........................................................................................ 30
PCI Device 0 ..................................................................................................... 30
1.5.1
1.5.2
1.5.3
1.5.4
1.5.5
1.5.6
1.5.7
1.5.8
1.5.9
1.5.10 SID - Subsystem Identification ................................................................. 40
1.5.11 CAPPTR - Capabilities Pointer ................................................................... 41
1.5.12 PXPEPBAR - PCI Express Egress Port Base Address ..................................... 41
1.5.13 MCHBAR - Processor Memory Mapped Register Range Base.......................... 43
1.5.14 GGC - Processor Graphics Control Register................................................. 44
1.5.15 DEVEN - Device Enable ........................................................................... 45
1.5.16 PCIEXBAR - PCI Express Register Range Base Address ................................ 46
1.5.17 DMIBAR - Root Complex Register Range Base Address ................................ 48
1.5.18 PAM0 - Programmable Attribute Map 0 ...................................................... 49
1.5.19 PAM1 - Programmable Attribute Map 1 ...................................................... 50
1.5.20 PAM2 - Programmable Attribute Map 2 ...................................................... 52
1.5.21 PAM3 - Programmable Attribute Map 3 ...................................................... 53
1.5.22 PAM4 - Programmable Attribute Map 4 ...................................................... 54
1.5.23 PAM5 - Programmable Attribute Map 5 ...................................................... 55
1.5.24 PAM6 - Programmable Attribute Map 6 ...................................................... 56
1.5.25 LAC - Legacy Access Control .................................................................... 57
1.5.26 REMAPBASE - Remap Base Address Register .............................................. 57
1.5.27 REMAPLIMIT - Remap Limit Address Register ............................................. 58
1.5.28 SMRAM - System Management RAM Control............................................... 58
1.5.29 ESMRAMC - Extended System Management RAM Control ............................. 60
1.5.30 TOM - Top of Memory ............................................................................. 61
1.5.31 TOUUD - Top of Upper Usable DRAM ......................................................... 62
1.5.32 GBSM - Graphics Base of Stolen Memory ................................................... 63
1.5.33 BGSM - Base of GTT Stolen Memory.......................................................... 63
1.5.34 TSEGMB - TSEG Memory Base.................................................................. 64
Processor Register Introduction .......................................................................... 29
Legacy Address Range ............................................................................ 14
Main Memory Address Range (1 MB to TOLUD)........................................... 18
PCI Memory Address Range (TOLUD – 4 GB).............................................. 20
Graphics Memory Address Ranges ............................................................ 22
System Management Mode (SMM) ............................................................ 25
Memory Shadowing ................................................................................ 28
I/O Address Space.................................................................................. 28
Memory Controller Decode Rules and Cross-Bridge Address Mapping ............. 29
VID - Vendor Identification ...................................................................... 32
DID - Device Identification....................................................................... 33
PCICMD - PCI Command ......................................................................... 34
PCISTS - PCI Status ............................................................................... 36
RID - Revision Identification .................................................................... 38
CC - Class Code ..................................................................................... 38
MLT - Master Latency Timer ..................................................................... 39
HDR - Header Type................................................................................. 39
SVID - Subsystem Vendor Identification .................................................... 40
3

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