MPC8533EVTARJ Freescale Semiconductor, MPC8533EVTARJ Datasheet - Page 1099

• Manufacturer Part Number: MPC8533EVTARJ
• Description: MPU POWERQUICC 783-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8533EVTARJ

• Processor Type: MPC85xx PowerQUICC III 32-Bit
• Speed: 1.067GHz
• Voltage: 1V
• Mounting Type: Surface Mount
• Package / Case: 783-FCPBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -

Table 18-44
Base address register 1 at offset 0x14 is used to define the inbound memory window in the 32-bit memory
space. The 32-bit memory BAR is shown in
Table 18-45
Base address register 2 at offset 0x18 and base address register 4 at offset 0x20 are used to define the lower
portion of the 64-bit inbound memory windows. The 64-bit low memory BARs are shown in
Freescale Semiconductor
31–12
11–4
Bits
2–1
Offset 0x14 (EP-mode only)
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
3
0
31–20 ADDRESS Indicates the base address that the inbound configuration window occupies. This window is fixed
19–4
Bits
2–1
Offset 0x10
Reset
W
3
0
R
31
W
ADDRESS
R
MemSp
Name
PREF
TYPE
31
describes the PCI Express configuration and status register base address register.
describes the PCI Express 32-bit memory BAR fields.
MemSp
—
Name
PREF
TYPE
MPC8533E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
Table 18-45. 32-Bit Memory Base Address Register (BAR1) Field Descriptions
—
Figure 18-47. PCI Express Base Address Register 0 (PEXCSRBAR)
Indicates the base address where the inbound memory window begins. The number of upper bits that
the device allows to be writable is selected through the inbound window size in the inbound window
attributes register (PEXIWAR1).
Reserved. The device allows a 4 Kbyte window minimum.
Prefetchable. This bit is determined by PEXIWAR1[PF].
Type.
00 Locate anywhere in 32-bit address space.
Memory space indicator.
ADDRESS
at 1 Mbyte.
Reserved
Prefetchable
Type.
00 Locate anywhere in 32-bit address space.
Memory space indicator
Figure 18-48. 32-Bit Memory Base Address Register (BAR1)
ADDRESS
Table 18-44. PEXCSRBAR Field Descriptions
20 19
Figure
18-48.
All zeros
—
Description
12 11
Description
—
4
PREF
4
3
PREF
PCI Express Interface Controller
1
3
2
TYPE
0
2
TYPE
Access: Mixed
1
Access: Mixed
Figure
0
1
MemSp
MemSp
0
0
0
18-49.
18-51