MPC8533EVTARJ Freescale Semiconductor, MPC8533EVTARJ Datasheet - Page 542

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MPC8533EVTARJ

Manufacturer Part Number
MPC8533EVTARJ
Description
MPU POWERQUICC 783-PBGA
Manufacturer
Freescale Semiconductor
Datasheets

Specifications of MPC8533EVTARJ

Processor Type
MPC85xx PowerQUICC III 32-Bit
Speed
1.067GHz
Voltage
1V
Mounting Type
Surface Mount
Package / Case
783-FCPBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-

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Security Engine (SEC) 2.1
Table 12-34
12.4.5.4
This RNG status register, shown in
signals.
The RNG status register is read-only. Writing to this location results in an address error being reflected in
the RNG interrupt status register.
Table 12-35
12-64
Address RNG 0x3_A028
0–60
40–47
48–57
Bits Name
0–39
61
62
63
Bits
Reset
58
W
R
SR
MI
RI
0
Name
HALT
OFL
describes the RNG reset control register fields.
Reserved
further resets the state of the RNG interrupt status register.
0 No reset
1 Reset interrupt logic
Module initialization. This reset value performs enough of a reset to prepare the RNG for another request, without
forcing the internal control machines and the output FIFO to be reset, thereby invalidating stored random
numbers or requiring reinvocation of a warm-up period. Module initialization is nearly the same as software reset,
except that the interrupt control register remains unchanged.
0 No reset
1 Reset most of RNG
and internal state are returned to their defined reset state.
0 No reset
1 Full RNG reset
describes the RNG status register fields.
Reset interrupt. Writing this bit active high causes RNG interrupts signaling DONE and ERROR to be reset. It
Software reset is functionally equivalent to hardware reset (the RESET signal), but only for the RNG. All registers
RNG Status Register (RNGSR)
MPC8533E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
Reserved
The number of dwords currently in the output FIFO.
Reserved
Halt. Indicates that the RNG has halted due to an error.
0 RNG not halted
1 RNG halted
Note: Because the error causing the RNG to stop operating may be masked before reaching the
interrupt status register, the RNG interrupt status register is used to provide a second source of
information regarding errors preventing normal operation.
Table 12-34. RNG Reset Control Register Field Descriptions
Table 12-35. RNG Status Register Field Descriptions
Figure
Figure 12-43. RNG Status Register
12-43, contains 6 fields that reflect the state of the RNG internal
39 40
All zeros
Description
OFL
Description
47 48
57
HALT
58
Freescale Semiconductor
59 60
Access: Read-only
61
IE
62
RD
63

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