MPC8533EVTARJ Freescale Semiconductor, MPC8533EVTARJ Datasheet - Page 974

• Manufacturer Part Number: MPC8533EVTARJ
• Description: MPU POWERQUICC 783-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8533EVTARJ

• Processor Type: MPC85xx PowerQUICC III 32-Bit
• Speed: 1.067GHz
• Voltage: 1V
• Mounting Type: Surface Mount
• Package / Case: 783-FCPBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -

DMA Controller
16.5
Figure 16-28
captive DMA controllers and virtually all can be served by the general purpose four-channel DMA
controller. This section provides information about how to make most effective use of these DMA
channels including the following topics:
16-38
•
•
•
•
•
•
If MRn[DAHE] is set, the destination interface transfer size capability must be greater than or
equal to MRn[DAHTS]. The destination address must be aligned to the size specified by DAHTS.
Destination striding is not supported if MRn[DAHE] is set and source striding is not supported if
MRn[SAHE] is set.
DMA transaction initiators (masters)
DMA targets, that is, data sources and destinations
Transparency of the bus interfaces to DMA operations
What is useful as opposed to what is possible. For example, it is possible to address any internal
register through the internal control bus, which means configuration and control registers can be
DMA source or destination targets. However, the typical use of DMA functionality is to reduce
host processor loading by moving large amounts of data with minimal CPU involvement. Using a
general-purpose DMA controller to load small amounts of configuration data only makes sense in
special circumstances (perhaps during system boot, for example).
DMA System Considerations
shows the most important data paths within the device. Many of these paths are served by
MPC8533E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
Freescale Semiconductor