MPC8533EVTARJ Freescale Semiconductor, MPC8533EVTARJ Datasheet - Page 58

• Manufacturer Part Number: MPC8533EVTARJ
• Description: MPU POWERQUICC 783-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8533EVTARJ

• Processor Type: MPC85xx PowerQUICC III 32-Bit
• Speed: 1.067GHz
• Voltage: 1V
• Mounting Type: Surface Mount
• Package / Case: 783-FCPBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -

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lviii
Transmit Multiple Collision Packet Counter Register Definition....................................... 15-95
Transmit Late Collision Packet Counter Register Definition ............................................. 15-96
Transmit Excessive Collision Packet Counter Register Definition .................................... 15-96
Transmit Total Collision Counter Register Definition ........................................................ 15-97
Transmit Drop Frame Counter Register Definition ............................................................ 15-97
Transmit Jabber Frame Counter Register Definition .......................................................... 15-98
Transmit FCS Error Counter Register Definition ............................................................... 15-98
Transmit Control Frame Counter Register Definition ........................................................ 15-99
Transmit Oversized Frame Counter Register Definition .................................................... 15-99
Transmit Undersize Frame Counter Register Definition .................................................. 15-100
Transmit Fragment Counter Register Definition .............................................................. 15-100
Carry Register 1 (CAR1) Register Definition................................................................... 15-101
Carry Register 2 (CAR2) Register Definition................................................................... 15-103
Carry Mask Register 1 (CAM1) Register Definition........................................................ 15-104
Carry Mask Register 2 (CAM2) Register Definition........................................................ 15-105
Receive Filer Rejected Packet Counter Register Definition ............................................. 15-106
IGADDRn Register Definition ......................................................................................... 15-107
GADDRn Register Definition........................................................................................... 15-108
FIFOCFG Register Definition .......................................................................................... 15-109
ATTR Register Definition ..................................................................................................15-111
ATTRELI Register Definition........................................................................................... 15-112
RQPRM Register Definition............................................................................................. 15-113
RFBPTR0–RFBPTR7 Register Definition........................................................................ 15-113
Control Register Definition............................................................................................... 15-116
Status Register Definition ................................................................................................. 15-117
AN Advertisement Register Definition............................................................................. 15-118
AN Link Partner Base Page Ability Register Definition .................................................. 15-120
AN Expansion Register Definition ................................................................................... 15-121
AN Next Page Transmit Register Definition .................................................................... 15-122
AN Link Partner Ability Next Page Register Definition .................................................. 15-123
Extended Status Register Definition ................................................................................. 15-123
Jitter Diagnostics Register Definition ............................................................................... 15-124
TBI Control Register Definition ....................................................................................... 15-125
eTSEC-MII Connection .................................................................................................... 15-127
eTSEC-RMII Connection ................................................................................................. 15-128
eTSEC-GMII Connection ................................................................................................. 15-129
eTSEC-RGMII Connection............................................................................................... 15-130
eTSEC-TBI Connection .................................................................................................... 15-131
eTSEC-RTBI Connection ................................................................................................. 15-132
eTSEC-FIFO (8-Bit) Connection...................................................................................... 15-139
8-Bit GMII-Style Packet FIFO Timing............................................................................. 15-139
MPC8533E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
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