MPC8533EVTARJ Freescale Semiconductor, MPC8533EVTARJ Datasheet - Page 813

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MPC8533EVTARJ

Manufacturer Part Number
MPC8533EVTARJ
Description
MPU POWERQUICC 783-PBGA
Manufacturer
Freescale Semiconductor
Datasheets

Specifications of MPC8533EVTARJ

Processor Type
MPC85xx PowerQUICC III 32-Bit
Speed
1.067GHz
Voltage
1V
Mounting Type
Surface Mount
Package / Case
783-FCPBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-

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15.5.3.6.8
Figure 15-59
Table 15-62
15.5.3.6.9
Figure 15-60
Table 15-63
Freescale Semiconductor
0–31
10-31
Bits
Bits
0–9
Offset eTSEC1:0x2_469C; eTSEC3:0x2_669C
Reset
Offset eTSEC1:0x2_46A0; eTSEC3:0x2_66A0
Reset
W
W
R
R
Name
RBYT
Name
RPKT
0
0
describes the fields of the RBYT register.
describes the fields of the RPKT register.
shows the RBYT register.
describes the definition for the RPKT register.
MPC8533E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
Receive Byte Counter (RBYT)
Receive Packet Counter (RPKT)
Receive byte counter. The statistic counter register increments by the byte count of frames received, including
those in bad packets, excluding preamble and SFD but including FCS bytes. In FIFO mode, all bytes (including
FCS bytes) are counted.
Reserved
Receive packet counter. Increments for each frame received packet (including bad packets, all unicast,
broadcast, and multicast packets).
Figure 15-60. Receive Packet Counter Register Definition
Figure 15-59. Receive Byte Counter Register Definition
Table 15-62. RBYT Field Descriptions
Table 15-63. RPKT Field Descriptions
9
10
All zeros
All zeros
RBYT
Description
Description
RPKT
Enhanced Three-Speed Ethernet Controllers
Access: Read/Write
Access: Read/Write
15-83
31
31

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