MPC8533EVTARJ Freescale Semiconductor, MPC8533EVTARJ Datasheet - Page 537

• Manufacturer Part Number: MPC8533EVTARJ
• Description: MPU POWERQUICC 783-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8533EVTARJ

• Processor Type: MPC85xx PowerQUICC III 32-Bit
• Speed: 1.067GHz
• Voltage: 1V
• Mounting Type: Surface Mount
• Package / Case: 783-FCPBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -

12.4.4.9
The MDEU ICV size register, shown in
compared if the MDEU performs ICV comparison. (See
(MDEUMR).”)
This register is cleared when the MDEU is reset or re-initialized.
12.4.4.10 MDEU EU Go Register (MDEUEUG)
The EU go register in the MDEU, see
completed. After the final message block is written to the input FIFO, the EU go register must be written.
The value in the data size register is used to determine how many bits of the final message block (always
512) is processed. Note that this register has no data size, and during the write operation, the host data bus
is not read. Hence, any data value is accepted. Normally, a write operation with a zero data value is
performed. Reading from this register is not meaningful, but a zero value is always returned, and no error
is generated. Writing to this register is merely a trigger causing the MDEU to process the final block of a
message, allowing it to signal DONE.
Freescale Semiconductor
Address MDEU 0x3_6040
58–60
62–63
Bits
54
55
56
57
61
Reset
W
R
0
Name
KSE
DSE
IFO
ME
AE
MDEU ICV Size Register (MDEUICVSR)
—
—
MPC8533E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
Table 12-33. MDEU Interrupt Control Register Field Descriptions (continued)
Key size error. A value outside the bounds 64 bytes was written to the MDEU key size register
0 Key size error enabled
1 Key size error disabled
Data size error. An inconsistent value was written to the MDEU data size register:
0 Data size error enabled
1 Data size error disabled
Mode error. An illegal value was detected in the mode register.
0 Mode error enabled
1 Mode error disabled
Address error. An illegal read or write address was detected within the MDEU address space.
0 Address error enabled
1 Address error disabled
Reserved
Input FIFO overflow. The MDEU input FIFO was pushed while full.
0 Input FIFO overflow error enabled
1 Input FIFO overflow error disabled
Reserved
Figure 12-37. MDEU ICV Size Register
Figure
Figure
12-38, is used to indicate an authentication operation may be
—
12-37, stores the number of bytes of the ICV result to be
All zeros
Section 12.4.4.1, “MDEU Mode Register
Description
Security Engine (SEC) 2.1
56 57
Access: Read/Write
ICV_SIZE
12-59
63