MPC8533EVTARJ Freescale Semiconductor, MPC8533EVTARJ Datasheet - Page 1203

• Manufacturer Part Number: MPC8533EVTARJ
• Description: MPU POWERQUICC 783-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8533EVTARJ

• Processor Type: MPC85xx PowerQUICC III 32-Bit
• Speed: 1.067GHz
• Voltage: 1V
• Mounting Type: Surface Mount
• Package / Case: 783-FCPBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -

Figure 20-6
Table 20-6
Freescale Semiconductor
12–13
14–15
16–20
8–11
Offset 0xE_1024
Reset
Bits
0–1
2–5
6–7
W
R
0xE_1034
0xE_1044
0xE_1054
0xE_1064
0xE_1074
0xE_1084
0xE_1094
0xE_10A4
0xE_10B4
0xE_10C4
0 1 2
— TRIGONSEL — TRIGOFFSEL TRIGONCNTL TRIGOFFCNTL
TRIGOFFCNTL Trigger-off control. Indicates the condition under which triggering to stop occurs
TRIGONCNTL Trigger-on control. Indicates the condition under which triggering to start counting occurs
TRIGOFFSEL
TRIGONSEL
describes PMLCBn fields.
shows performance monitor local control registers 1–9.
Figure 20-6. Performance Monitor Local Control Register B (PMLCB1–PMLCB9)
Name
MPC8533E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
—
—
—
5 6 7 8
Reserved
Trigger-on select. Set this field equal to the number of the counter that should trigger event counting
to start. When the specified counter’s TRIGONCNTL event overflows, the current counter begins
counting. No triggering occurs when TRIGONSEL = current counter.
Reserved
Trigger-off select. Set this field equal to the number of the counter that should trigger event counting
to stop. When the specified counter’s TRIGONCNTL event overflows, the current counter stops
counting. No triggering occurs when TRIGOFFSEL = current counter.
00 Trigger off (no triggering to start)
01 Trigger on change
10 Trigger on overflow
11 Reserved
00 Trigger off (no triggering to stop)
01 Trigger on change
10 Trigger on overflow
11 Reserved
Reserved
Table 20-6. PMLCB n Field Descriptions
11
12
13
All zeros
14
Description
15
16
—
20 21
TBMULT
Device Performance Monitor
23 24 25 26
Access: Read/Write
—
THRESHOLD
20-9
31