MPC8533EVTARJ Freescale Semiconductor, MPC8533EVTARJ Datasheet - Page 93

• Manufacturer Part Number: MPC8533EVTARJ
• Description: MPU POWERQUICC 783-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8533EVTARJ

• Processor Type: MPC85xx PowerQUICC III 32-Bit
• Speed: 1.067GHz
• Voltage: 1V
• Mounting Type: Surface Mount
• Package / Case: 783-FCPBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -

Conventions
This document uses the following notational conventions:
cleared/set
mnemonics
italics
0x0
0b0
rA, rB
rD
REG[FIELD]
x
x
n
¬
&
|
||
Freescale Semiconductor
W
W FIELDNAME
W
R FIELDNAME
R
R
—
MPC8533E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
When a bit takes the value zero, it is said to be cleared; when it takes a value of
one, it is said to be set.
Instruction mnemonics are shown in lowercase bold.
Italics indicate variable command parameters, for example, bcctrx.
Book titles in text are set in italics
Internal signals are set in lowercase italics, for example, core_int
Prefix to denote hexadecimal number
Prefix to denote binary number
Instruction syntax used to identify a source GPR
Instruction syntax used to identify a destination GPR
Abbreviations for registers are shown in uppercase text. Specific bits, fields, or
ranges appear in brackets. For example, MSR[LE] refers to the little-endian mode
enable bit in the machine state register.
In some contexts, such as signal encodings, an unitalicized x indicates a don’t
care.
An italicized x indicates an alphanumeric variable.
An italicized n indicates a numeric variable.
NOT logical operator
AND logical operator
OR logical operator
Concatenation, for example TCR[WP]||TCR[WPEXT]
Indicates a reserved bit field in a memory-mapped or an e500 register.
Indicates a read-only bit field in a memory-mapped register.
Indicates a write-only bit field in a memory-mapped register. Although these bits
can be written to as ones or zeros, they are always read as zeros.
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