HD6432670 Hitachi, HD6432670 Datasheet - Page 11

• Manufacturer Part Number: HD6432670
• Description: (HD64F267x Series) 16-Bit Microcomputer
• Manufacturer: Hitachi

5.1
5.2
5.3
5.4
5.5
5.6
5.7
Section 6 Bus Controller (BSC) .....................................................................119
6.1
6.2
6.3
Features ....................................................................................................................... 85
Input/Output Pins ......................................................................................................... 86
Register Descriptions ................................................................................................... 87
5.3.1
5.3.2
5.3.3
5.3.4
5.3.5
5.3.6
5.3.7
Interrupt Sources.......................................................................................................... 100
5.4.1
5.4.2
Interrupt Exception Handling Vector Table................................................................... 102
Interrupt Control Modes and Interrupt Operation .......................................................... 107
5.6.1
5.6.2
5.6.3
5.6.4
5.6.5
Usage Notes.................................................................................................................116
5.7.1
5.7.2
5.7.3
5.7.4
5.7.5
5.7.6
Features ....................................................................................................................... 119
Input/Output Pins ......................................................................................................... 121
Register Descriptions ................................................................................................... 123
6.3.1
6.3.2
6.3.3
6.3.4
6.3.5
6.3.6
6.3.7
6.3.8
Interrupt Control Register (INTCR) ................................................................. 87
Interrupt Priority Registers A to K (IPRA to IPRK).......................................... 88
IRQ Enable Register (IER) .............................................................................. 90
IRQ Sense Control Registers H and L (ISCRH, ISCRL) ................................... 92
IRQ Status Register (ISR)................................................................................ 97
IRQ Pin Select Register (ITSR)........................................................................ 98
Software Standby Release IRQ Enable Register (SSIER).................................. 100
External Interrupts ........................................................................................... 100
Internal Interrupts ............................................................................................ 101
Interrupt Control Mode 0 ................................................................................. 107
Interrupt Control Mode 2 ................................................................................. 109
Interrupt Exception Handling Sequence ........................................................... 110
Interrupt Response Times ................................................................................ 112
DTC and DMAC Activation by Interrupt ......................................................... 113
Contention between Interrupt Generation and Disabling ................................... 116
Instructions that Disable Interrupts................................................................... 117
Times when Interrupts are Disabled ................................................................. 117
Interrupts during Execution of EEPMOV Instruction........................................ 117
Change of IRQ Pin Select Register (ITSR) Setting ........................................... 117
Note on IRQ Status Register (ISR)................................................................... 118
Bus Width Control Register (ABWCR)............................................................ 124
Access State Control Register (ASTCR)........................................................... 124
Wait Control Registers AH, AL, BH, and BL
(WTCRAH, WTCRAL, WTCRBH, and WTCRBL)......................................... 125
Read Strobe Timing Control Register (RDNCR) .............................................. 130
Area 0 Burst ROM Interface Control Register (BROMCRH)
Area 1 Burst ROM Interface Control Register (BROMCRL) ............................ 133
Bus Control Register (BCR)............................................................................. 134
DRAM Control Register (DRAMCR) .............................................................. 136
Assertion Period Control Registers H, L (CSACRH, CSACRL).................. 131
Rev. 2.0, 04/02, page ix of xliv