HD6432670 Hitachi, HD6432670 Datasheet - Page 32

• Manufacturer Part Number: HD6432670
• Description: (HD64F267x Series) 16-Bit Microcomputer
• Manufacturer: Hitachi

Figure 8.5 Example of Timing in Cycle Steal Mode ............................................................... 351
Figure 8.6 Examples of Timing in Burst Mode....................................................................... 352
Figure 8.7 Examples of Timing in Normal Transfer Mode...................................................... 353
Figure 8.8 Example of Timing in Block Transfer Mode.......................................................... 354
Figure 8.9 Example of Repeat Area Function Operation......................................................... 355
Figure 8.10 Example of Repeat Area Function Operation in Block Transfer Mode.................. 356
Figure 8.11 EDTCR Update Operations in Normal Transfer Mode and Block Transfer Mode 358
Figure 8.12 Procedure for Changing Register Settings in Operating Channel .......................... 359
Figure 8.13 Example of Channel Priority Timing ................................................................... 361
Figure 8.14 Examples of Channel Priority Timing.................................................................. 362
Figure 8.15 Example of Normal Transfer Mode (Cycle Steal Mode) Transfer......................... 363
Figure 8.16 Example of Normal Transfer Mode (Burst Mode) Transfer.................................. 364
Figure 8.17 Example of Block Transfer Mode (Cycle Steal Mode) Transfer ........................... 364
Figure 8.18 Example of Normal Mode Transfer Activated by EDREQ Pin Falling Edge......... 365
Figure 8.19 Example of Block Transfer Mode Transfer Activated
Figure 8.20 Example of Normal Mode Transfer Activated by EDREQ Pin Low Level............ 367
Figure 8.21 Example of Block Transfer Mode Transfer Activated by EDREQ Pin Low Level 368
Figure 8.22 Example of Single Address Mode (Byte Read) Transfer ...................................... 369
Figure 8.23 Example of Single Address Mode (Word Read) Transfer..................................... 369
Figure 8.24 Example of Single Address Mode (Byte Write) Transfer ..................................... 370
Figure 8.25 Example of Single Address Mode (Word Write) Transfer .................................... 370
Figure 8.26 Example of Single Address Mode Transfer Activated
Figure 8.27 Example of Single Address Mode Transfer Activated
Figure 8.28 Auto Request/Cycle Steal Mode/Normal Transfer Mode
Figure 8.29 Auto Request/Cycle Steal Mode/Normal Transfer Mode
Figure 8.30 Auto Request/Cycle Steal Mode/Normal Transfer Mode
Figure 8.31 Auto Request/Burst Mode/Normal Transfer Mode
Figure 8.32 Auto Request/Burst Mode/Normal Transfer Mode
Figure 8.33 Auto Request/Burst Mode/Normal Transfer Mode
Figure 8.34 Auto Request/Burst Mode/Normal Transfer Mode
Figure 8.35 External Request/Cycle Steal Mode/Normal Transfer Mode
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(No Contention/Dual Address Mode)................................................................... 373
(CPU Cycles/Single Address Mode) .................................................................... 374
(Contention with Another Channel/Single Address Mode) ................................... 374
(CPU Cycles/Dual Address Mode/BGUP = 0) ..................................................... 375
(CPU Cycles/Dual Address Mode/BGUP = 1) ..................................................... 375
(CPU Cycles/Single Address Mode/BGUP = 1) ................................................... 376
(Contention with Another Channel/Single Address Mode) ................................... 376
(No Contention/Dual Address Mode/Low Level Sensing) .................................... 377
by EDREQ Pin Falling Edge............................................................................... 366
by EDREQ Pin Falling Edge............................................................................... 371
by EDREQ Pin Low Level ................................................................................. 372