HD6432670 Hitachi, HD6432670 Datasheet - Page 362

no-image

HD6432670

Manufacturer Part Number
HD6432670
Description
(HD64F267x Series) 16-Bit Microcomputer
Manufacturer
Hitachi
Datasheet
A byte or word transfer is performed for a single transfer request, and after the transfer, the bus is
released. While the bus is released, one or more bus cycles are executed by the CPU or DTC.
In the transfer end cycle (the cycle in which the transfer counter reaches 0), a one-state DMA dead
cycle is inserted after the DMA write cycle.
for which the
Figure 7.30 shows an example of single address mode transfer activated by the
edge.
Rev. 2.0, 04/02, page 316 of 906
Address bus
Pin Falling Edge Activation Timing: Set the DTA bit in DMABCRH to 1 for the channel
ø
Figure 7.29 Example of Single Address Mode Transfer (Word Write)
release
Bus
pin is selected.
DMA write
release
Bus
DMA write
release
Bus
Last transfer
DMA write
cycle
DMA
dead
pin falling
release
Bus

Related parts for HD6432670