HD6432670 Hitachi, HD6432670 Datasheet - Page 397
HD6432670
Manufacturer Part Number
HD6432670
Description
(HD64F267x Series) 16-Bit Microcomputer
Manufacturer
Hitachi
Datasheet
1.HD6432670.pdf
(953 pages)
- Current page: 397 of 953
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If a transfer request occurs in another channel during DMA transfer, the bus is temporarily
released, then transfer is performed on the channel for which the transfer request was issued. If
there is no external space bus request from another bus master, a one-cycle bus release interval is
inserted. For details on the operation when there are requests for a number of channels, see section
8.4.8, Channel Priority Order.
Figure 8.5 shows an example of the timing in cycle steal mode.
Burst Mode: In burst mode, once the EXDMAC acquires the bus it continues transferring data,
without releasing the bus, until the transfer end condition is satisfied. There is no burst mode in
external request mode.
In burst mode, once transfer is started it is not interrupted even if there is a transfer request from
another channel with higher priority. When the burst mode channel finishes its transfer, it releases
the bus in the next cycle in the same way as in cycle steal mode.
When the EDA bit is cleared to 0 in EDMDR, DMA transfer is halted. However, DMA transfer is
executed for all transfer requests generated within the EXDMAC up until the EDA bit was cleared
to 0.
If a repeat area overflow interrupt is generated, the EDA bit is cleared to 0 and transfer is
terminated.
When the BGUP bit is set to 1 in EDMDR, the bus is released if a bus request is issued by another
bus mastership during burst transfer. If there is no bus request, burst transfer is executed even if
the BGUP bit is set to 1.
Figure 8.6 shows examples of the timing in burst mode.
Bus cycle
Transfer conditions:
· Single address mode, normal transfer mode
·
· CPU internal bus master is operating in external space
Figure 8.5 Example of Timing in Cycle Steal Mode
low level sensing
CPU
CPU
EXDMAC
Bus returned temporarily to CPU
CPU
CPU
Rev. 2.0, 04/02, page 351 of 906
EXDMAC
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